The present invention relates to a semiconductor apparatus, and particularly to a semiconductor apparatus such as an insulated gate transistor having a trench structure.
In recent years, as a speedup, high functionalization and low power consumption in electronic equipment such as a mobile telephone are required, a speedup and low power consumption are also desired in a semiconductor apparatus installed in the electronic equipment. Generally, a transistor used in a DC-DC converter and a load switch, etc. with small on resistance is required in order to cope with the speedup and low power consumption. As a method to reduce the on resistance of the transistor, miniaturizing an individual device and increasing a density of a transistor placed per unit area is given. Concrete method is a miniaturization of a trench in a vertical MOSFET with a gate electrode formed in the trench. In this method, the trenches in which transistors are formed are placed in a stripe shape and a width of the trench is miniaturized and also a pitch between the adjacent trenches is decreased and thereby a density of the transistors is increased.
As an example, there is a structure in which multiple trenches are arranged inside a semiconductor chip and a MOSFET is arranged inside the trenches. In this structure, a gate pad is formed on a part of the surface of the semiconductor chip and a gate electrode formed by filling the trenches with polycrystalline silicon is connected to this gate pad by gate wiring formed along the peripheral edge of the semiconductor chip.
As a result of conducting various experiments, the present inventors et al. ascertained that with narrowing of a trench width, a fine sub-trench is formed in a termination part of a trench and this portion becomes a cause of deterioration of a withstand voltage.
A trench is normally formed by etching a substrate surface by reactive ion etching using a mask pattern formed on a surface of silicon substrates. As a result of this, with miniaturization of a trench width, etching gas concentrates in a termination part of the pattern inside the trench and the gas has nowhere to go. Therefore, the gas accumulates in a lower part and supply of an etchant becomes excess locally and thereby, a fine trench (hereinafter called a sub-trench) may be locally formed downward from the bottom of the original trench. Also, in the opening upper edge of the trench, an overhang shape is sometimes formed.
When the sub-trench is formed thus, oxygen is resistant to being supplied to the sub-trench at the time of subsequently forming a silicon oxide by thermal oxidation in an inner wall of the trench. Thus, there is a problem that deterioration of a withstanding voltage at the sub-trench is not avoidable.
In addition to above incomplete oxidation, an influence of stress to the trench caused by an insulator film formed on upper layer of the gate electrode which is formed inside of the trench at a connection part with gate wiring along the peripheral edge of the semiconductor chip. This becomes particularly remarkable in a termination part of the trench in trench etching.
Hence, the present applicant has proposed a MOSFET in which a termination part of a trench is widely constructed (JP-A-2007-48769).
Consequently, oxidation-induced stress resulting from a sub-trench in the termination part of the trench is reduced and deterioration of a withstand voltage can be prevented.
However, in recent years, demands on high current increase and a film thickness of metal wiring as an electrode formed on a surface of a chip constructing this semiconductor apparatus is thick relative to a trench size. Accordingly, distortion of stress to which the trench under this metal wiring is subjected becomes a serious problem.
First, an N-type MOSFET having a conventional stripe-shaped trench gate is explained with reference to FIGS. 9 to 12 as one example of a semiconductor apparatus in order to manifest the problem. FIG. 9 is a top diagram of this N-type MOSFET and a sectional diagram of X-X′ of FIG. 9 is shown in FIG. 10. A plurality of trench lines are formed on a semiconductor layer and termination parts of the trench lines are directly connected to gate peripheral wiring. An N-type diffusion region constructing a source region is formed in an epitaxial layer of both ends so as to abut on the trench lines. Also, the opening end of a region in which an N-type diffusion layer constructing a source region 13 is electrically connected to metal wiring constructing a source electrode (pad) 8, that is, a source contact opening part 3 is disposed on trench lines (4) as shown in FIG. 9. As shown in FIG. 9, in a region of a corner part α of the opening end of a source electrode, a corner portion of a source contact opening part is formed on terminations of the trench lines (4) because of placement of a pattern. At this time, stress by the thick metal wiring constructing the source electrode 8 concentrates in the vicinity of this corner and causes distortion in a trench structure located in a lower part (FIG. 10 is a main enlarged explanatory diagram corresponding to a section of A-A of FIG. 11 (a main enlarged diagram of FIG. 9)). Also, formation of the corner portion of the source contact opening part 3 on the terminations of the trenches 4 means that the edge of an insulating film 15 is also positioned on this trench and when the trench end is present in a lower part of the edge of the insulating film 15, a channel of this transistor is formed along an outer wall of the trench. As a result of this, when distortion occurs in the trench, distortion also occurs in the channel formed along the outer wall of the trench and problems of an increase in a leakage current and a decrease in a withstand voltage between a drain and a source might arise.
Also, in the leakage current, the problem of the leakage current resulting from the trench distortion was serious in a body region as well as the source region.
The semiconductor apparatus having the conventional stripe-shaped trench gate as described above is shown in main enlarged diagrams in FIGS. 11 and 12. In this conventional apparatus, there is a region in which a corner portion of the source contact opening part (edge line) 3, that is, an edge portion of the source electrode 8 is formed in upper parts of the trench lines (4) or edges of the trench lines because of restriction of a pattern. This region is the cause of a problem that stress by metal wiring etc. constructing a source electrode concentrates and distorts a trench structure and a withstand voltage and leakage characteristics are deteriorated.
This problem becomes particularly serious as a trench becomes finer and a film thickness of the metal wiring constructing the source electrode becomes thicker with respect to a trench width. Now the occurrence of distortion in the vicinity of the trench depending on whether or not to abut on the metal wiring with a thick film thickness becomes a serious problem.
Also, as described above, etching gas used for forming a trench concentrates in a termination of the trench and a fine sub-trench is locally formed downward. In the case of thermal oxidation of an inner wall of the trench, insufficient supply of oxygen makes a film thickness of a silicon oxide film thin. As a result, when a high electric field is applied to this portion, deterioration of a withstand voltage occurs.
Furthermore, an insulating film formed on gate wiring causes stress distortion to a trench in a connection part to the gate wiring of a peripheral edge part of a chip.